Siemens has expanded its collaboration with TSMC to advance AI-powered automation and semiconductor design enablement, aiming to help mutual customers improve productivity, accelerate design cycles and manage rising complexity in advanced chip design.

Building on their long-standing partnership within the TSMC Open Innovation Platform (OIP) ecosystem, the companies have enabled an AI-powered agent for automated design rule check (DRC) fixing across digital and custom integrated circuit design flows, powered by Siemens’ Calibre, Aprisa and Solido software.

Agentic workflows target design-to-tapeout speed

The collaboration also extends to agentic workflows for custom IC design, place-and-route and digital implementation, intended to automate repetitive tasks, improve design convergence and accelerate time-to-tapeout. The AI-powered DRC-fix workflow combines Calibre, Aprisa AI and Solido Fuse technologies to identify, analyse and resolve design rule violations, building on the existing Calibre Check Assist capability.

“Our continued collaboration with TSMC exemplifies Siemens’ commitment to delivering AI-driven automation and advanced semiconductor design capabilities that help customers innovate at the industry’s most advanced process nodes,” said Ankur Gupta, executive vice president for EDA IC software at Siemens Digital Industries Software. “By combining Siemens’ EDA portfolio with TSMC’s leading process and packaging technologies, we are helping customers achieve new levels of productivity, speed and design confidence.”

“AI presents a significant opportunity to drive productivity and efficiency across increasingly complex semiconductor design workflows,” said Aveek Sarkar, director of the ecosystem and alliance management division at TSMC. “Our collaboration with OIP partners like Siemens focuses on delivering intelligent, trusted automation that empowers engineers to navigate rising design complexity while achieving stringent performance and energy-efficiency targets.”

Extending support to advanced packaging and process nodes

The partnership also covers Siemens’ support for TSMC’s advanced process technologies, 3D IC and advanced packaging, including TSMC 3DFabric, silicon photonics and chip-package co-design workflows. Siemens said its Calibre 3DStack Advanced software now supports multi-machine inter-chiplet antenna verification, including for TSMC-SoIC, while certification work is under way for chip-on-wafer-on-substrate with local silicon interconnect (CoWoS-L).

On advanced nodes, Siemens’ Calibre nmDRC, Calibre nmLVS, Calibre xACT and Calibre PERC tools have achieved certification for the TSMC A14 process node, while its Solido Simulation Suite is certified for SPICE accuracy across TSMC’s N3C, A16 and A14 process technologies.